Software development can be tricky at times. But software development is outright annoying or even impossible if developer don’t have access to the run-time behavior of their software. That’s where debug and diagnosis tools come to rescue – they are the key hole through which developers can observe the software execution. Questions like “Which values are inside the CPU registers?”, or “What functions have been called before the execution reached a given point?” are just two examples of an endless stream of questions developers ask when trying to understand software behavior.
Gaining insight into the software execution is particularly tricky on embedded systems. Even these seemingly “small” systems have grown insanely complex over the years. Think multi-core CPUs, a huge number of dedicated hardware units, and complex memory and interconnect hierarchies, all inside a tiny little chip, possibly located in a remote location on the other side of the earth.
In DiaSys, which is the title of my research work, I’m looking at ways to make software debugging and diagnosis easier on embedded platforms. My main idea is to process and analyze all observation data which is generated during software run-time as close to the source as possible, and make useful information out of it. For example, when observing a CPU, DiaSys tries to filter out all data which isn’t relevant to answer a diagnosis problem right there at the CPU. The same goes for observation data from interconnects, hardware accelerators, and much more. Additionally, the data can be combined and processed further before they arrive at developers or automated tools.
To make all that work, I’m focusing on two areas:
- How can we enable software developers to describe their diagnosis or debugging task in a way that can be executed in such a diagnosis system?
- What trade offs in the software/hardware architecture of such a diagnosis system exist. Where’s the sweet spot from a cost and performance standpoint?
- P. Wagner, T. Wild, and A. Herkersdorf, “DiaSys: Improving SoC insight through on-chip diagnosis,” Journal of Systems Architecture, vol. 75, pp. 120–132, Apr. 2017. Available online at ScienceDirect (published version) and arxiv (updated preprint).
See my personal page at TUM for a full list of publications.